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China factory - Shenzhen Hongxinwei Technology Co., Ltd

Shenzhen Hongxinwei Technology Co., Ltd

  • China,Shenzhen ,Guangdong
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China 512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI
China 512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI

  1. China 512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI
  2. China 512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI
  3. China 512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI

512M 3.3V SDRAM 32Mx16 166MHz 54 Pin TSOP II DRAM IS42S16320F-6TLI

  1. MOQ: 10pcs
  2. Price: NEGOTIABLE
  3. Get Latest Price
Payment Terms T/T
Supply Ability 1080
Delivery Time 2-3DAYS
Packaging Details 108pcs/tray
Package / Case TSOP-54
Data Bus Width 16 bit
Organization 32 M x 16
Memory Size 512 Mbit
Maximum Clock Frequency 167 MHz
Access Time 6 ns
Supply Voltage - Max 3.6 V
Supply Voltage - Min 3 V
Supply Current - Max 120 mA
Minimum Operating Temperature - 40 C
Factory Pack Quantity 108box
Brand Name ISSI
Model Number IS42S16320F-6TLI
Certification ROHS
Place of Origin CHINA

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  1. Product Details
  2. Company Details

Product Specification

Payment Terms T/T Supply Ability 1080
Delivery Time 2-3DAYS Packaging Details 108pcs/tray
Package / Case TSOP-54 Data Bus Width 16 bit
Organization 32 M x 16 Memory Size 512 Mbit
Maximum Clock Frequency 167 MHz Access Time 6 ns
Supply Voltage - Max 3.6 V Supply Voltage - Min 3 V
Supply Current - Max 120 mA Minimum Operating Temperature - 40 C
Factory Pack Quantity 108box Brand Name ISSI
Model Number IS42S16320F-6TLI Certification ROHS
Place of Origin CHINA
High Light 54 Pin TSOP II DRAM166MHz TSOP II DRAM512M 3.3V SDRAM

  IS42S16320F-6TLI DRAM 512M, 3.3V, SDRAM, 32Mx16, 166MHz, 54 Pin TSOP II (400 Mil) RoHS, IT

1.FEATURES

Clock frequency: 200, 166, 143 MHz
• Fully synchronous; all signals referenced to a positive clock edge
• Internal bank for hiding row access/precharge
• Power supply: Vdd/Vddq = 2.3V-3.6V IS42/45SxxxxxF - Vdd/Vddq = 3.3V IS42/45RxxxxxF - Vdd/Vddq = 2.5
• LVTTL interface• Programmable burst length – (1, 2, 4, 8, full page)
• Programmable burst sequence:Sequential/Interleave • Auto Refresh (CBR)• Self Refresh
• 8K refresh cycles every 64 ms
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write operations capability
• Burst termination by burst stop and precharge command
• Packages:x8/x16: 54-pin TSOP-II, 54-ball TF-BGA (x16 only)
• Temperature Range
:Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
Automotive, A1 (-40oC to +85oC)
Automotive, A2 (-40oC to +105oC)

2.DEvIcE OvERvIEW

The 512Mb SDRAM is a high speed CMOS, dynamic random-access memory designed to operate in either 3.3V Vdd/Vddqor 2.5V Vdd/Vddqmemory systems, depending on the DRAM option. Internally configured as a quad-bank DRAM with a synchronous interface.
The 512Mb SDRAM (536,870,912 bits) includes an AUTO REFRESH MODE, and a power-saving, power-downmode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible.
The 512Mb SDRAM has the ability to synchronously burst data at a high data rate with automatic column-address generation, the ability to interleave between internal banks to hide precharge time and the capability to randomly change column addresses on each clock cycle during burst access
.A self-timed row precharge initiated at the end of the burst
sequence is available with the AUTO PRECHARGE functionenabled. Precharge one bank while accessing one of the other three banks will hide the precharge cycles and provide seamless, high-speed, random-access operation.
SDRAM read and write accesses are burst oriented starting at a selected location and continuing for a programmed number of locations in a programmed sequence. The registration of an ACTIVE command begins accesses, followed by a READ or WRITE command. The ACTIVE command in conjunction with address bits registered are used to select the bank and row to be accessed (BA0, BA1 select the bank; A0-A12 select the row). The READ or WRITE commands in conjunction with address bits registered are used to select the starting column location for the burst access.
Programmable READ or WRITE burst lengths consist of 1, 2, 4 and 8 locations or full page, with a burst terminate option

3.PIN CONFIGURATIONS54 pin TSOP - Type II for x16

4.Why choose us?

100% new and originao with Advantage price
High efficiency
Fast Delivery
Professional team service
10 Years Experience Electronic components
Electronic components Agent
Advantage logistic discount
Excellent After-sales Service

Company Details

Bronze Gleitlager

,

Bronze Sleeve Bushings

 and 

Graphite Plugged Bushings

 from Quality China Factory
  • Business Type:

    Manufacturer,Distributor/Wholesaler,Agent,Importer

  • Year Established:

    1998

  • Total Annual:

    50000000-70000000

  • Employee Number:

    100~200

  • Ecer Certification:

    Site Member

Shenzhen Hongxinwei Technology Co., Ltd is located in the Bao’an District of Shenzhen.It is a high-tech enterprise setting research and development, production, sales into an integration. The company covers an area of 15 acres, having modern producing workshop and professional production and t... Shenzhen Hongxinwei Technology Co., Ltd is located in the Bao’an District of Shenzhen.It is a high-tech enterprise setting research and development, production, sales into an integration. The company covers an area of 15 acres, having modern producing workshop and professional production and t...

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Get in touch with us

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  • Shenzhen Hongxinwei Technology Co., Ltd
  • 3418, Duhuixuan, Shennan Avenue, Futian District, Shenzhen, Guangdong Province, China
  • https://www.igbt-powermodule.com/

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